1. Field of the Invention
The invention relates to a dielectric ceramic, and a laminated ceramic capacitor configured with the use of the dielectric ceramic, and more particularly, relates to an improvement for making the withstand voltage of a dielectric ceramic higher.
2. Description of the Related Art
As one of effective means for satisfying the demands of reduction in size and increase in capacitance for laminated ceramic capacitors, an attempt to make dielectric ceramic layers included in laminated ceramic capacitors thinner may be made.
However, making the dielectric ceramic layers thinner also makes it easier to cause dielectric breakdown in laminated ceramic capacitors when a large direct current or the like is applied. Given these circumstances, it is important that the voltage at dielectric breakdown (BDV=break down voltage) is high, and therefore, dielectric ceramics with high BDVs have been required.
Core-shell materials are suitable for applications in which relatively large voltages are applied. Dielectric ceramics including both crystalline grains which have a core-shell structure and crystalline grains which have a homogeneous structure have been used when in addition to a high BDV, good electronic characteristics (dielectric constant, the temperature characteristics of capacitance, the lifetime characteristics in a high temperature load test, etc.) are desired.
For example, Japanese Patent No. 3376963 (Patent Document 1) and Japanese Patent No. 3793697 (Patent Document 2) disclose dielectric ceramics including both crystalline grains which have a core-shell structure and crystalline grains which have a homogeneous structure, and laminated ceramic capacitors using the dielectric ceramics.
The dielectric ceramic used in the laminated ceramic capacitor disclosed in Patent Document 1 has a mixture of grains which have a core-shell structure and grains which have a homogeneous structure, and when any cross section of the ceramic sintered body is observed, the grains which have the core-shell structure and the grains which have the homogeneous structure are present at an area ratio in the range of 2:8 to 4:6. According to this dielectric ceramic, it seems that the relative dielectric constant is increased to 4500 or more, and a laminated ceramic capacitor using this dielectric ceramic satisfies D characteristics as temperature characteristics of capacitance in accordance with the JIS standard (Japanese industrial standard).
On the other hand, the dielectric ceramic of the laminated ceramic capacitor disclosed in Patent Document 2 has a shell thickness which changes as the grain which has the core-shell structure becomes closer to a conductive layer, and grains which have no core-shell structure, that is, which have the homogeneous structure, are present at the interface between the layer and the conductor, and the ratio between the grains which have the core-shell structure and the number of the grains which have no core-shell structure is 7:3 or more and 9:1 or less. It seems that the employment of such a configuration improves the withstand voltage characteristics.
However, the dielectric ceramics disclosed in each of Patent Documents 1 and 2 described above still have problems to be solved.
More specifically, the dielectric ceramic described in Patent Document 1 can be further improved with respect to the temperature characteristics of capacitance, as it fails to satisfy the X5R characteristics in accordance with the EIA standard. Furthermore, the increase in the ratio of the crystalline grains which have the homogeneous structure easily results in grain growth, in particular, when the layer is made further thinner, and the lifetime characteristics may be decreased.
While it seems that the dielectric ceramic described in Patent Document 2 improves the withstand voltage characteristics, that withstand voltage characteristics is still unsatisfactory when the layer is made further thinner. Furthermore, the desired lifetime characteristics is also difficult to achieve.